In a computer, or other digital electronic device, data is typically stored as a series of binary `1`s and `0`s defining a word, where each binary word is stored in a memory such as a register. Data may be stored in fixed point format wherein the position of the radix point is fixed with respect to one end of the word. Data may also be stored in floating point format wherein each number is represented as a sign, a signed exponent, and a significand, where the numerical value, if any, is the signed product of its significand and the radix raised to the power of the exponent. Several floating point formats are disclosed in the IEEE (Institute of Electrical and Electronics Engineers) Standard for Binary Floating Arithmetic (ANSI/IEEE Std. 754-1985) which is hereby incorporated by reference.
The IEEE single precision format is shown in FIG. 1. This format is comprised of 32 bits, B0 to B31. The mantissa or fractional part 102 comprises 23 bits, B0 to B22. These bits are the significant digits of the number to be represented. The mantissa has a leading `1` that is implied by the format so the actual precision of the mantissa is 24 bits. The exponential part 104 comprises 8 bits, B23 to B30, and is a power of 2 multiplier applied to the mantissa, 102. The exponent is "biased" by adding 127. Therefore, if e is the value of the exponent field, then E is the actual value of the exponent for the number represented, e=E+127. Thus, an exponent field of "01111111" corresponding to bits B30 to B23, respectively, represents a numerical exponent of zero. A sign bit, 106, is included as the most significant bit (MSB) B31 of the entire 32-bit word and identifies the sign of the mantissa 102. Similar fields, and a corresponding exponent bias are defined for the IEEE double precision floating point format.
To convert a number in IEEE floating point format to a fixed point format, the exponent bias is subtracted from the value of the exponent field. The resulting unbiased exponent value, E, is then used to shift the mantissa (including the implied leading `1`) by E bits. A positive value of E means a left shift is necessary. A negative value of E means a right shift is necessary. A left shift which is greater than or equal to the number of bits of integer information in the fixed point number results in an overflow. A right shift which results in the rightmost `1` of the mantissa ending up in a bit position that is farther right than the last bit in the fractional portion of the fixed point format results in a loss of precision. For example, take a floating point number that has a mantissa (including implied leading `1`) of "1.00100000" and convert it to a fixed point format that has 3 bits of integer information and 5 bits of fractional information. if the unbiased exponent is -1, the resulting fixed point number would be "000.10010". However, if the unbiased exponent is -3, the resulting fixed point number would be "000.00100". The loss of precision results from discarding the rightmost `1`. The loss of precision can be illustrated by converting the resulting fixed point number "000.00100" back into floating point format. The conversion back to floating point format results in a mantissa of "1.00000000". This is not the same as the original floating point number because a loss of precision has occurred.
The accuracy of arithmetic operations performed by digital electronic devices can depend on detecting a loss of precision when converting a number from a floating point format to a fixed point format. Therefore, there is a need to for a versatile method and circuit capable of determining when converting a number from a floating point format to a fixed point format results in a loss of precision. Furthermore, determining when a trailing bit will be lost during conversion to a fixed point format is useful when rounding numbers. Such a circuit should be adaptable to conversions between a variety of floating point and fixed point formats. Such a circuit should also operate with minimal delay, be simple and inexpensive to implement, and be reliable.